Motorola Cpu32

• The CPU core, designed to minimize transistors while maximizing performance. The CPU has a high-speed clocked serial debugger interface called "background debug mode." The 683XX-series was the first to have a clocked serial interface to the CPU to perform debugging. Now, many CPUs use a standard serial test interface for this purpose.
• The SIM (System Interface Module), which eliminates much "glue logic" by decoding addresses into control signals. It also provides a clock generator, watchdogs for various system operations, access to most processor pins as parallel ports, and a periodic timer. It also provides an interrupt controller.
• The Timing Processor Unit (TPU), which performs almost any timing related task: timers, counters, proportional pulse width control, pulse width measurement, pulse generation, stepper motor controllers, quadrature detection, etc.

• An auxiliary RAM doubles as a programmable microcontroller store for the TPU, and Motorola gives the development system and code away for free.
• Some earlier models have two conventional counter-timers.
• Some models have a network interface processor.
• Most models has a "serial peripheral interface", a clocked serial interface that can rapidly load bits into an external device.
• Most models have a serial UART.

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