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XeonThe Xeon is Intel's current generation of server-class microprocessors for PCs. Pentium II Xeon The first Xeon processor was released in 1998 as the Pentium II Xeon as the replacement of the Pentium Pro. The Pentium II Xeon used either a 440GX (a dual-processor workstation chipset) or 450NX (quad-processor, or oct with additional logic) chipset, and differed from its forerunner in that it had a full-speed, off-die L2 cache. Cache sizes were 512KB, 1MB and 2MB, and it used a 100MHz bus. Pentium III Xeon In 1999, the Pentium II Xeon was replaced by the Pentium III Xeon. The initial version (Tanner) was no different to its predecessor, save the addition of SSE and a few cache controller enhancements found in the Pentium III. The second version (Cascades) was somewhat more controversial, in that while it had a 133MHz bus it only had a 256KB on-die L2 cache - in other words, there was no difference between it and the desktop Pentium III. In order to remedy the situation somewhat, Intel released a second version (also called Cascades, but often suffixed to Cascades 2MB to differentiate between it and the 256KB version) with 2MB of L2 cache. The bus speed on these models was fixed at 100MHz, though in practise the cache was able to offset this. Xeon & Xeon MP (32-bit) The Xeon (dropping "Pentium" from the name) was introduced in mid-2001. The initial variant, Foster, was no different from the desktop Pentium 4. While it made a somewhat good workstation chip, it was almost always outperformed in server applications by the older Cascade 2MB core and AMD's Athlon MP. Combined with the need to use expensive Rambus Dynamic RAM (RDRAM), the Foster's sales were somewhat unimpressive. Foster only supported 2 processors, so a second version (Foster MP) was introduced with a 1MB L3 cache. This improved performance slightly, but not by enough to lift it out of third place. It was also much more expensive than the dual-processor (DP) versions. In 2002 a 130nm version of the Xeon (this time codenamed Prestonia) was released, now supporting Intel's new Hyper-Threading technology and having a 512KB L2 cache. A new server chipset, E7500 (which allowed the use of dual-channel DDR SDRAM) was released to support this processor in servers, and shortly afterwards the bus speed was boosted to 533MHz (accompanied by new chipsets; the E7501 for servers and the E7505 for workstations). The new Xeon performed much better than its predecessor and noticeably better than Athlon MP. The support of new features in the E75xx series also gave it a key advantage over the Pentium III Xeon and Athlon MP (both stuck with rather old chipsets), and it quickly became the top-selling server/workstation processor. The Xeon MP version of the Prestonia was the Gallatin, which had an L3 cache of 1MB or 2MB. This version also performed a lot better than Foster MP, and was popular in servers. Later on, Intel's experience with the 130nm process allowed them to port the Xeon over to the Gallatin core and also allowed a Xeon MP with 4MB cache. Xeon (64-bit) Due to a severe lack of success with Intel's Itanium and Itanium 2 processors, the 90nm version of the Pentium 4 (Prescott) was built with support for 64-bit instructions (called EM64T by Intel, though it was much the same as AMD's AMD64 instruction set), and a Xeon version codenamed Nocona was released in 2004. Released with it were the E7525 (workstation), E7520 and E7320 (both server) chipsets, which added support for PCI Express, DDR-II and Serial ATA. Generally speaking the Xeon was noticeably slower than AMD's Opteron, though it could also be much faster in situations where Hyper-Threading came into play. A slightly updated core called Irwindale was released in early 2005, differing from Nocona in having twice the L2 cache and the ability to reduce its clockspeeds in situations that didn't need much processing power. Current performance numbers are somewhat limited, though the independant tests which have been conducted show the Irwindale outperforming the Opteron. Future versions Cranford The Xeon MP version of Irwindale. Expected to be the same, except supporting more then two processors. Potomac A Xeon MP, based on Nocona with an 8MB L3 cache. It has been much-delayed, and it has been speculated that it may be cancelled and replaced by Cranford. Dempsey A dual-core Nocona, consisting of two Nocona dies simply placed side-by-side. Paxville An improved version of Dempsey, having a dedicated bus arbiter unit that bridges the two cores. Woodcrest Supposedly based on a dual-core, 64-bit version of the Pentium M, though current details are somewhat sparse. | Xeon Processors, Designations, and Characteristics | | Public Desigination | Core (Intel Codename) | CPU Frequency | Frontside Bus Frequency / Theoretical Bandwidth | Cache | Interface | Additional Features | | Pentium II Xeon | Drake | 400MHz-450MHz | 100 MHz / 800MB/s | 16K L1 data + 16K L1 instruction; 512KB/1MB/2MB L2 | Slot 2 | N/A | | Pentium III Xeon | Tanner | 500MHz-550MHz | 100 MHz / 800MB/s | 16K L1 data + 16K L1 instruction; 512KB/1MB/2MB L2 | Slot 2 | Support of SSE instructions and Processor Serial Number | | Pentium III Xeon | Cascades | 600MHz-1000MHz | 133 MHz / 1066MB/s | 16K L1 data + 16K L1 instruction; 256KB L2 | Slot 2 | On-Die L2 Cache | | Pentium III Xeon | Cascades 2MB | 700MHz-900MHz | 100 MHz / 800MB/s | 16K L1 data + 16K L1 instruction; 2MB L2 | Slot 2 | Larger L2 cache, and support for more than 2-way configurations | | Xeon | Foster | 1400MHz-2000MHz | 100 MHz / 3.2GB/s | 8K L1 data + 12K L1 instruction; 256KB L2 | Socket 603 | Based on Pentium 4's Netburst core; supports SSE2 and removes Processor Serial Number | | Xeon MP | Foster MP | 1400MHz-1600MHz | 100 MHz / 3.2GB/s | 8K L1 data + 12K L1 instruction; 256KB L2; 512K/1MB L3 | Socket 603 | Adds L3 cache, and support for more than 2-way configurations | | Xeon | Prestonia | 1600MHz-2800MHz | 100 MHz / 3.2GB/s | 8K L1 data + 12K L1 instruction; 512KB L2 | Socket 603 | Supports Hyper-Threading | | Xeon | Prestonia | 2000MHz-3060MHz | 133 MHz / 4.2GB/s | 8K L1 data + 12K L1 instruction; 512KB L2 | Socket 604 | Faster Front-Side Bus | | Xeon | Gallatin | 3060MHz-3200MHz | 133 MHz / 4.2GB/s | 8K L1 data + 12K L1 instruction; 512KB L2; 1MB L3 | Socket 604 | Adds 1MB of L3 cache | | Xeon MP | Gallatin | 1500MHz-3000MHz | 100 MHz / 3.2GB/s | 8K L1 data + 12K L1 instruction; 512KB L2; 1MB/2MB/4MB L3 | Socket 603 | Adds L3 cache, and support for more than 2-way configurations | | Xeon | Nocona | 2800MHz-3600MHz | 200 MHz / 6.4GB/s | 16K L1 data + 12K L1 instruction; 1MB L2 | Socket 604 | Larger caches; support for SSE3, EM64T and the NX (No eXecute) bit. | | Xeon | Irwindale | 3000MHz-3600MHz | 200 MHz / 6.4GB/s | 16K L1 data + 12K L1 instruction; 2MB L2 | Socket 604 | Larger L2 cache and dynamic speed-variation | See also: List of Intel microprocessors Intel 6862X
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